parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10 v 0.63 i d @ t c = 100c continuous drain current, v gs @ 10 v 0.40 a i dm pulsed drain current 5.0 p d @t c = 25c power dissipation 1.0 w linear derating factor 0.0083 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy 60 mj i ar avalanche current 0.63 a e ar repetitive avalanche energy 0.10 mj dv/dt peak diode recovery dv/dt 4.8 v/ns t j operating junction and -55 to + 150 t stg storage temperature range c soldering temperature, for 10 seconds 300 (1.6mm from case) IRFD224 hexfet ? power mosfet pd -9.1272 revision 0 v dss = 250v r ds(on) = 1.1 w i d = 0.63a absolute maximum ratings thermal resistance parameter min. typ. max. units r q ja junction-to-ambient ? ? 120 c/w dynamic dv/dt rating repetitive avalanche rated for automatic insertion end stackable fast switching ease of paralleling simple drive requirements third generation hexfets from international rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on- resistance and cost-effectiveness. the 4-pin dip package is a low-cost machine-insertable case style which can be stacked in multiple combinations on standard 0.1 inch pin centers. the dual drain serves as a thermal link to the mounting surface for power dissipation levels up to 1 watt. description a hd-1
parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 250 ? ? v v gs = 0v, id = 250a d v (br)dss / d t j breakdown voltage temp. coefficient ? 0.36 ? v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance ? ? 1.1 w v gs = 10.0v, i d = 0.38a v gs(th) gate threshold voltage 2.0 ? 4.0 v v ds = v gs , i d = 250a g fs forward transconductance 1.5 ? ? s v ds = 50v , i d = 2.6a i dss drain-to-source leakage current ? ? 25 v ds = 400v , v gs = 0v ? ? 250 v ds = 320v , v gs = 0v, t j = 125c i gss gate-to-source forward leakage ? ? 100 v gs = 20v gate-to-source reverse leakage ? ? -100 v gs = -20v q g total gate charge ? ? 14 i d = 4.4a q gs gate-to-source charge ? ? 2.7 nc v ds = 200v q gd gate-to-drain ("miller") charge ? ? 7.8 v gs = 10v, see fig. 6 and 13 t d(on) turn-on delay time ? 7.0 ? v dd = 125v t r rise time ? 13 ? i d = 4.4a t d(off) turn-off delay time ? 20 ? r g = 18 w t f fall time ? 12 ? r d = 28 w, see fig. 10 l d internal drain inductance ? 4.0 ? between lead, 6mm (0.25in.) l s internal source inductance ? 6.0 ? from package and center of die contact c iss input capacitance ? 260 ? v gs = 0v c oss output capacitance ? 77 ? pf v ds = 25v c rss reverse transfer capacitance ? 15 ? ? = 1.0mhz, see fig. 5 IRFD224 notes: parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) showing the i sm pulsed source current integral reverse (body diode) p-n junction diode. v sd diode forward voltage ? ? 1.8 v t j = 25c, i s = 0.63a, v gs = 0v t rr reverse recovery time ? 200 400 ns t j = 25c, i f = 4.4a q rr reverse recovery charge ? 0.93 1.9 c di/dt = 100a/s t on forward turn-on time repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) v dd = 50v, starting t j = 25c, l = 15mh r g = 25 w , i as = 2.5a. (see figure 12) i sd 4.4a, di/dt 90a/s, v dd v (br)dss , t j 150c pulse width 300s; duty cycle 2%. source-drain ratings and characteristics electrical characteristics @ t j = 25c (unless otherwise specified) intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) ? ? 5.0 ? ? 0.63 a a na ns nh
fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature IRFD224 fig 1. typical output characteristics, t c = 25 o c fig 2. typical output characteristics, t c = 150 o c r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d , d r a i n c u r r e n t ( a m p s ) i d , d r a i n c u r r e n t ( a m p s ) i d , d r a i n c u r r e n t ( a m p s )
IRFD224 fig 7. typical source-drain diode forward voltage fig 8. maximum safe operating area fig 5. typical capacitance vs. drain-to-source voltage fig 6. typical gate charge vs. gate-to-source voltage c a p a c i t a n c e ( p f ) v g s , g a t e - t o - s o u r c e v o l t a g e ( v o l t s ) i s d , r e v e r s e d r a i n c u r r e n t ( a m p s ) i d , d r a i n c u r r e n t ( a m p s )
IRFD224 fig 10a. switching time test circuit fig 9. maximum drain current vs. case temperature fig 10b. switching time waveforms fig 11. maximum effective transient thermal impedance, junction-to-case i d , d r a i n c u r r e n t ( a m p s )
IRFD224 fig 13a. basic gate charge waveform fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit fig 13b. gate charge test circuit fig 12c. maximum avalanche energy vs. drain current
IRFD224 dv/dt test circuit peak diode recovery test circuit
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